If cs is low active, then it should be exactly the other way round. Cs should be low when phi2 is high, because the falling edge of phi2 is where the data transfer happens. André Am 1. April 2016 22:16:25 schrieb didier derny <didier@aida.org>: > I tried to combine cs + phi2 with a 74LS32 CS is now shorter but I have > an horrible glitch > > in blue: PHI2 > in red: CS > > > On 31/03/2016 22:10, Gerrit Heitsch wrote: >> On 03/31/2016 09:55 PM, didier derny wrote: >>> cs is low for the entire phi2 cycle >>> phi2 in blue, cs in red >>> >>> cs is build from a cs from the bus subdivided by a 74ls138 + 74ls04 >> >> OK, that could be a problem since the addresses become valid somewhere >> in the middle of PHI2 being low. That's why when using a RAM, you make >> sure R/W can only become LOW while PHI2 is HIGH, otherwise you will >> destroy data. >> >> Try to limit CS going LOW to the period when the addresses match _and_ >> PHI2 is high. >> >> Gerrit >> >> >> >> >>> >>> >>> >>> On 31/03/2016 21:45, Gerrit Heitsch wrote: >>>> On 03/31/2016 09:35 PM, didier derny wrote: >>>>> Finally it works at even and odd addresses >>>>> >>>>> I observed both case with the oscilloscope ODD and EVEN addresses >>>>> >>>>> the differences between both case was that when the code was at odd >>>>> addresses >>>>> the A0 line was at the same value for the next cycle, >>>>> so the hypothesis was that CH376 was removing the data to fast when A0 >>>>> changed... >>>>> >>>>> so I added a small capacitor between A0 and GND (on the CH376) >>>>> >>>>> now A0 is delayed and it works where ever is the code (odd/even) >>>>> >>>>> how could I solve this problem properly ? >>>>> I don't like this capacitor on the address bus... >>>> >>>> You still didn't tell us if CS is low while PHI2 is high or not. >>>> Mixing this up would explain your problem... >>>> >>>> Gerrit >>>> >>>> >>>> >>>> >>>>> >>>>> thanks to all >>>>> >>>>> -- >>>>> didier >>>>> >>>>> >>>>> On 30/03/2016 22:08, Gerrit Heitsch wrote: >>>>>> On 03/30/2016 09:44 PM, didier derny wrote: >>>>>>> if I remove the board and inject a signal on A0 >>>>>>> I get the signals on other pins a few mv >>>>>>> a little bit higher on CS >>>>>>> >>>>>>> I checked with the oscilloscope >>>>>>> >>>>>>> CS / PHI2 with the code odd/even seems ok cs go low on falling >>>>>>> edge >>>>>>> of phi2 / go up on raising edge of phi2 (same for odd and even) >>>>>> >>>>>> Huh? According to what I could find, CS is low_active on that chip. >>>>>> Meaning you need to have CS low when PHI2 is high. >>>>>> >>>>>> Gerrit >>>>>> >>>>>> >>>>>> >>>>>> Message was sent through the cbm-hackers mailing list >>>>> >>>>> >>>>> Message was sent through the cbm-hackers mailing list >>>>> >>>>> >>>> >>>> >>>> Message was sent through the cbm-hackers mailing list >>> >> >> >> Message was sent through the cbm-hackers mailing list > Message was sent through the cbm-hackers mailing listReceived on 2016-04-01 21:00:19
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