Re: FPGATED

From: smf <smf_at_null.net>
Date: Sat, 23 Jul 2016 22:35:42 +0100
Message-ID: <e12d7f8d-c53c-1796-f3d0-d878bc5f3883@null.net>
On 23/07/2016 20:08, Segher Boessenkool wrote:
> Why do you think you can set all port bits on the 8500? 

Interestingly the preliminary 6510 datasheet has a different pinout that 
includes all 8 bits on the io port.

http://archive.6502.org/datasheets/mos_6510_mpu_nov_1982.pdf

The later datasheet lists three chips (6510, 6510-1 & 6510-2). The 
former is the c64 pinout, the other two have all 8 bits on the io port.

http://archive.6502.org/datasheets/mos_6510_mpu.pdf

So at least on the 6502, I would expect it to be a bond out issue. 
However If you can't read back what you've written to outputs then the 
sense lines aren't connected to the output buffers, or there may not be 
output buffers on the missing bits. It would seem odd for them to create 
masks for each pin configuration, but then we don't know that these 
chips were even produced.



       Message was sent through the cbm-hackers mailing list
Received on 2016-07-23 22:00:19

Archive generated by hypermail 2.2.0.