Re: Die shot of the 8500R4 CPU

From: Gerrit Heitsch <*gerrit_at_laosinh.s.bawue.de*> Date: Wed, 28 Dec 2016 17:04:08 +0100 Message-ID: <40e98c02-be3f-9389-b2da-79d0e906fcf9@laosinh.s.bawue.de> · gerrit_at_laosinh.s.bawue.de

On 12/28/2016 01:06 PM, smf wrote:
> The 8500 only has P0-P5 bonded out.
>
> I've not seen an 8501 die shot, but I assumed the 8 bits were all there
> and they only bonded out P0-P4 & P6-P7. It had to fit in a 40 pin chip
> and they also dropped NMI & Phi2 out.

For the 8501 die shots go here:

http://visual6502.org/images/pages/MOS_8501_die_shots.html

> It would have made more sense if the 6510/8500 bonded out P0-P3 & P6 &
> P7, as you could use N & V flags after an LDA for branching based on
> P6/P7 without any comparison instruction required.

Yes, and you can see the 2 unused pads for P6 and P7 on the die of the 8500.

  Gerrit

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