On 12/29/2017 10:19 AM, Francesco Messineo wrote: > On Fri, Dec 29, 2017 at 1:50 AM, Mia Magnusson <mia@plea.se> wrote: >> Den Thu, 28 Dec 2017 15:44:13 +0100 skrev Francesco Messineo >> <francesco.messineo@gmail.com>: >>>> I don't have any idea why the 6540 needs the latch. An EPROM >>>> doesn't need one. >>> >>> it probably doesn't *need* a latch, they thought it would be useful in >>> some other architectures, before deciding it would be cheaper to add >>> more glue logic and use standard RAM/ROMs. >>> >>> If the 6540 latches addresses internally on rising edge of PHI2 it >>> means it can't easily be read on a standard programmer. >> >> Well, a standard eprom programmer would read the old adress when >> A0/PHI2 is low, and when A0/PHI2 goes high the 6540 would output >> correct content on the data bus. Thus you'll have to throw away every >> odd byte from the readout, but every even byte would be fine. This >> assumes that there are no noise on A1...Ax at the time A0 goes high. >> > > It's not that easy: if you use the plain A0 as phi2, then A0 toggles > together with other addresses, it > means that the rising edge of A0 is too close to the other addresses > edges, and that violates the Tads of 80 ns minimum Yes, but A0 toggles twice before A1 changes. So one of the edges should see all other address bits unchanged => no problem with the setup time. Gerrit Message was sent through the cbm-hackers mailing listReceived on 2017-12-29 18:00:05
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