> With 70 ns the 65816 has to insert 1 waitstate for every instruction. The > effect is 10 MHz. It may be worse than you think. 70ns is probably the access time, the memory cycle time would be around twice that. eg the TM124MBK36E (1MB x 36 module) spec sheet says for tRAC=70ns, max tRC=130ns min bogax - This message was sent through the cbm-hackers mailing list. To unsubscribe: echo unsubscribe | mail cbm-hackers-request@dot.tml.hut.fi.
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