Re: PC-card (4)

g.baltissen_at_hccnet.nl
Date: 2001-04-14 18:02:13

Hallo David,

> The ISA bus cannot run at 1mhz.  A fair number o fcards might be using 
> this as a timing source, and it will throw things off big. 

I don't know of any cards using this clock-signal.

>  We have an 8mhz signal, its called the  dotclock.  THe ISA bus has a 
> method for dealing with slow devices.  Its called wait states.  Our 
> commodore will use them ;)  

If you refer to the IOCHRDY-signal, it's meant to slow down the computer, 
not for slowing down cards :) When addressing I/O, the PC automatically 
inserts enough waitstates so that the bus seems to run at 2 MHz.  
Until now I haven't seen any I/O-cards using this line either. This means 
that every I/O card is able to run on the C64 as the bus of C64 is "slower" 
the ISA-bus.
How can one slow down a card: very simple, by extending the appropiate 
read/write-signal. I only can say this: I had no problems with CGA, MGP and 
multi-I/O cards in 1990. Dutch comment: behaalde resultaten in het verleden 
geven geen garantie voor de toekomst.

Another matter could be: isn't the C64 not too slow for some PC-cards? IMHO 
I don't think so. But I cannot proove it. 

> For synchronization, the c64 also has waitstates.  Have a look at the RDY 
> line. 

If you mean iochRDY, see remark above. If you mean the RDY-input of the 
processor, you won't find this at the expansionport. To access it, you 
really have to do some hacking. And as already mentioned, I haven't found a 
card yet which needs this slowdown.  

> When doing DMA, it doesnt matter, as ISA is plenty fast bto be able to
> squeeze one byte in per c-64 cycle.

I found an 1987 Intel databook with the 8237. I don't know if the contents 
is the same as your URL:
http://support.intel.com/support/controllers/peripheral/231466.htm

As said, the 8237 needs 4 cycli per byte (only two in compressed mode = 256 
bytes). Running the 8237 at 4 MHz would give is a 1 MB/sec transferspeed. 
Please have a look at fig. 12, the memeory-to-memory transfer, at page 
2-221. The MEMW cycle is only about 125 nsec. long, and that is too short. 
Same for compressed mode.

Of course I tried to find other solutions like temporary buffers etc. but I 
ended up with a huge construction and still wasn't sure if it would work at 
all. 

So speaking for my self: I'll run the 8237 at 1 MHz unless one of you 
(including the lady) has a better idea. 

Groetjes, Ruud

http://Ruud.C64.org/



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