Hallo allemaal, Studying the schematic at the end of the PRG, I noticed that the BA-line running from the VIC to the expansion slot crossed the one running from the PLA to the AND-gate. Only croosed, _NO_ connection. I presume this is an error. Can anybody confirm this, please? IIRC, the BA-line becomes active some cycles before the VIC tristates the CPU? Thanks for any answers. Groetjes, Ruud http://Ruud.C64.org - This message was sent through the cbm-hackers mailing list. To unsubscribe: echo unsubscribe | mail cbm-hackers-request@dot.tml.hut.fi.
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