On Tue, 15 May 2001, Ruud Baltissen wrote: > I know the VIC-II refreshes the DRAM's just by accessing them during > CLK2=(L). But this cannot be a random access otherwise there is a risk that > a row is not refreshed. So there must be a system. > Regarding this system, how do the addresslines behave the moment RAS=(L) and > CAS=(H) because this is the address to be refreshed? According to the tests by Andreas Boose and me in 1994, the refresh counter counts addresses in the $3f00-$3fff range downwards. This result is documented in <URL:http://www.funet.fi/pub/cbm/documents/chipdata/VIC-Article.gz>: 3.13. DRAM refresh ------------------ The VIC does five read accesses in every raster line for the refresh of the dynamic RAM. An 8 bit refresh counter (REF) is used to generate 256 DRAM row addresses. The counter is reset to $ff in raster line 0 and decremented by 1 after each refresh access. So the VIC will access addresses $3fff, $3ffe, $3ffd, $3ffc and $3ffb in line 0, addresses $3ffa, $3ff9, $3ff8, $3ff7 and $3ff6 in line 1 etc. Refresh addresses +----+----+----+----+----+----+----+----+----+----+----+----+----+----+ | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | +----+----+----+----+----+----+----+----+----+----+----+----+----+----+ | 1 | 1 | 1 | 1 | 1 | 1 |REF7|REF6|REF5|REF4|REF3|REF2|REF1|REF0| +----+----+----+----+----+----+----+----+----+----+----+----+----+----+ Marko - This message was sent through the cbm-hackers mailing list. To unsubscribe: echo unsubscribe | mail cbm-hackers-request@dot.tml.hut.fi.
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