Re: VIC - DRAM-refresh

From: John (john_at_ucc.gu.uwa.edu.au)
Date: 2001-05-15 16:04:19

Ruud Baltissen writes:

>Just one question: is it possible by hardware to detect the start of a
>rasterline and in particular line 0?

How much hardare? :-)  The easiest way is probably to watch the video sync
signal (are horizontal and vertical sync available separately?  I can't
remember).

If you know there's no DMA trickery going on, you can watch VIC's BA
signal.  Wait until it has been inactive for more than 500 or so cycles,
then the first activation will be the first bad line.  Count cycles from
there until the one you want.

If VIC's address outputs are available, it might be possible to watch for
the DRAM refresh cycles.

Just some random ideas.

John
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