From: Baltissen, GJPAA (Ruud) (ruud.baltissen_at_abp.nl)
Date: 2004-05-06 08:00:02
Hallo allemaal,
> <http://www.6502.org/forum/viewtopic.php?t=186>
http://www.6502.org/forum/viewtopic.php?t=186
I hate to bring bad news but I ran into trouble two weeks ago when
experimenting with my SuperVIC-20. I latch A16..23 using a 74ALS573 clocked
by PHI1 (generated from PHI0 using two 04 invertors). The VIC-20 doesn't use
the RDY-input but I need it for debugging purposes. And I noticed that the
573 latched the data instead of the address that the 65816 normally presents
when PHI2 = (L). This means that the clock for the 573 needs to be
manipulated in some way. I already worked out a little circuit (one 7402 and
one 7400 IC) but details are at home.
--
___
/ __|__
/ / |_/ Groetjes, Ruud
\ \__|_\
\___| URL: Ruud.C64.org
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