On 2012-09-12, at 20:56, Ruud@Baltissen.org wrote: > Hallo Gerrit, > > >> The LE-signal for the 74HCT573 is connected to _RAS. The OR-Gate takes >> _RAS and _CAS as inputs and the output is the _CS signal for the SRAM. >> In theory, just _CAS should work, but it doesn't, the system crashes, >> possible due to _CAS being run through the PLA and _RAS going inactive >> before _CAS does. >> >> With the OR-Gate the circuit works. > > I don't understand this. Using an OR gate means that _CS is only > active LOW when as well _CAS as _RAS are LOW. Then why doesn't _RAS > alone work? I cannot image that _RAS starts to early. IMHO it will > become LOW after every flank of PHI2. > > If you has said you ANDed both signals, I would have taken that for > granted immediately. Hmm.. ORing them "waits" for both going LO before selecting the chip. To me it makes some sense, if the _CAS is delayed through PLA propagation, to wait for it so that the timing remains more or less unchanged. -- SD! Message was sent through the cbm-hackers mailing listReceived on 2012-09-12 20:00:11
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