Re: More CPLD explorations

From: Gerrit Heitsch <gerrit_at_laosinh.s.bawue.de>
Date: Tue, 25 Feb 2014 20:48:31 +0100
Message-ID: <530CF38F.3080506@laosinh.s.bawue.de>
On 02/25/2014 08:35 PM, silverdr@wfmh.org.pl wrote:
> On 2014-02-25 at 19:08:03, Gerrit Heitsch (gerrit@laosinh.s.bawue.de) wrote:
>
>>
>> If you feel adventurous, use your Oscilloscope to visualize
>> what happens
>> on a C64 board with GND. Hook up the GND part of the probe to GND at
>> the
>> power supply intput and the other part to GND at the keyboard connector.
>> On a KU you will see peaks of up to 1V (peak to peak).
>
> Now that’s a “WOW” .. ! I’d never expect such things on a professionally designed PCB. Really. That might mean that some chips are indeed swinging on the verges of usable voltage ranges, which may in fact explain the “pickyness” of this board to a degree.

The fun part is, if you look at a chip itself and measure just between 
+5V and GND of that chip, everything is a bit noisy, but not really bad.

It's just that the ends of the board in relation to each other do funny 
things. The 1V peak-to-peak is only a few ns, and a half cycle is about 
500ns.

After all, the board is working...

  Gerrit





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