On 3/8/2014 11:42 AM, Gerrit Heitsch wrote: > On 03/07/2014 09:55 AM, John McKenna wrote: >> Excellent, thank you. That makes a lot more sense. I'll see if I can >> make it fit a 64/32. > > Here's something else I remembered today. > > All the 1551 I have seen use a 6525A as the TIA, but I remember seeing > an Image of a 1551 PCB that used a 6523A. Looking at the schematics of > the drive (*) confirms that the drive does not use the IRQ capability > of the 6525, the only IRQ source in a 1551 is a 555 rigged as an > oscillator and hooked up to _IRQ of the 6510T. The code seems to be > doing everything else by polling (in or out of the IRQ routine). > > (*) > http://zimmers.net/anonftp/pub/cbm/schematics/drives/new/1551/251860.gif > > So, to me it looks like what needs to be implemented to keep our 1551 > running is an CPLD implementation of the 6523 which is a bit simpler > than the 6525. I believe I have a Verilog implementation of the 6523T, but am working on one verilog syntax issue in order to trim the code down to get it to fit a 44 pin device, which I can then test in my 1551 (I use a module to implement the actual DDR defined register to IO connections, and I want to use parms to set the bit length for each port. I am struggling to figure out how to do an "assign" statement in a for loop. Once I figure out how to do that, I can trim PORTB and PORTC to 2 bits each via the parm.) It currently synthesizes into a 9572(XL), but might fit in a 9536(xl) if I can trim the 12 bits of unused IO. For those who want to poke at the code: Not sure if this link works, but here's the ISE prj: https://www.dropbox.com/sh/49jba4d6idwv1af/xaHxce2NIz And the primary HDL file: https://www.dropbox.com/sh/49jba4d6idwv1af/2aY1b2d95W/MOS6523T/cbm6523t.v Jim Message was sent through the cbm-hackers mailing listReceived on 2014-03-08 20:00:07
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