On 4/22/2016 4:16 PM, silverdr@wfmh.org.pl wrote: > I also considered only the two mentioned but tried not to decide at this stage. IOW tried to avoid "vendor lock" while I have still no idea what I am looking for in those devices. Tried to think of something like a kind of virtual chip that could be programmed and tested in a sim environment. I can't force you to do anything, but I strongly believe you'd be better to go with a tool and a family and get going. > Thanks Jim. And thanks to other who answered. Seemingly "vendor lock" > is unavoidable if I want to make some progress in this field. I don't think so. Now that I have Xilinx ISE WebPACK understood, it's not going to be hard to get up to speed on Altera's tools. >> I will admit that strategic and timely help from a few knowledgeable people who knew more about HDL than I was immensely helpful. I am happy to pass on that help, because I am now pretty comfortable with the toolchain (Verilog, still learning, as I am still messing up when to use reg or wire) > So you went the Verilog rather than VHDL route, right? I did, because it looks close enough to 'C' and I am a C programmer. That said, VHDL was designed in the US, but is the favorite of non US countries. Verilog was developed (I don't honestly know), but US folks favor it. VHDL is so verbose, and I have always been a fan of the compact nature of C. Jim > -- Jim Brain brain@jbrain.com www.jbrain.com Message was sent through the cbm-hackers mailing listReceived on 2016-04-23 05:00:02
Archive generated by hypermail 2.2.0.