> On 2017-11-10, at 16:00, Jim Brain <brain@jbrain.com> wrote: > >> I hated the fact that I was not able to put all the supplies and bypasses in a dedicated schematics area but had to clutter the main schematic instead. > > Can you show an example? I *think* I know what you mean by putting all supplies and bypasses ina area (I put mine in the bottom left of the sheet that holds the IC they are for, with main VRs and board level bypasses on a separate sheet), That's almost exactly what I am used to do. The difference being that I prefer bottom right ;-) I once worked for a company that does lots of electronic stuff. Mostly ECU for major players in automotive industry though. Kind of rather advanced stuff with much more strict constraints than consumer electronics due to automotive certifications. I wasn't doing electronics there but since I like it, I watched how they design things, participated sometimes in schematics reviews, etc. One of the things which I liked a lot was that "obvious things" must not obscure the designer's intentions. Like if you are designing a functional block, cluttering its schematics with supplies and bypasses was treated as obscuring the message/intentions and would not pass any review session. > but I am unclear on how KiCAD makes you place them. There are no "power gates" in KiCAD. There are "invisible pins" instead. Therefore I wasn't able to "invoke power gates" and place them wherever I see fit. I needed to make "invisible pins" visible and connect them right on the symbol. >> But OK, I did it. Everything looked OK. I got no ERC errors, nothing, and the board would be unusable anyway because two chips were not connected to power/GND plane. Luckily I am used to eyeball the gerbers for possible last minute corrections. > Ooh, no ERC errors either? Precisely! > Surely that's a bug someone is squashing, as I would think that is foundational. I reported this. There was even somewhat lengthy discussion on the forum. The understanding was that it's the "invisible pins" feature that makes unconnected (invisible) pins go unnoticed during ERC check. Somewhat in the style "it's a feature, not a bug" but I recall eventually getting a dev admit that it can qualify as bug. AFAIR the suggested fix was to drop the "hidden pins" though. -- SD! - http://e4aws.silverdr.com/ Message was sent through the cbm-hackers mailing listReceived on 2017-11-10 23:00:02
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