On 11/15/2017 05:29 AM, Steve Gray wrote: > Thanks for the offer Mike. I've ordered a few off ebay so I should get > them by 2019 ;-) Make sure to test them thoroughly. I had people claim that they received fakes or defective ones. The ones I ordered were OK except the datecodes were suspicious. Gerrit > If you can bring one to the meeting that would be great, and I'll return > when mine arrive. > > Steve > > > ------------------------------------------------------------------------ > *From:* Mike Stein <mhs.stein@gmail.com> > *To:* cbm-hackers@musoftware.de > *Sent:* Tuesday, November 7, 2017 5:44 PM > *Subject:* Re: Hardware emulation of 6509 using 6502? > > I should have at least one 65C02 in stock that I'm not using; could > bring it to the meeting next week or drop it off if you're in a hurry. > m > > ----- Original Message ----- > *From:* Steve Gray <mailto:sjgray@rogers.com> > *To:* cbm-hackers@musoftware.de <mailto:cbm-hackers@musoftware.de> ; > Michał Pleban <mailto:lists@michau.name> > *Sent:* Tuesday, November 07, 2017 4:53 PM > *Subject:* Re: Hardware emulation of 6509 using 6502? > > I have an MCUMALL GQ-4X programmer, which I think has JTAG support > but I've never tried it. Yup, I'm in Canada. > I guess I need to get a 65C02 as well unless you can supply one Jim. > Anyway, still willing to give it a shot. > > Steve > > > ------------------------------------------------------------------------ > *From:* Jim Brain <brain@jbrain.com <mailto:brain@jbrain.com>> > *To:* Michał Pleban <lists@michau.name <mailto:lists@michau.name>>; > cbm-hackers@musoftware.de <mailto:cbm-hackers@musoftware.de> > *Sent:* Tuesday, November 7, 2017 4:46 PM > *Subject:* Re: Hardware emulation of 6509 using 6502? > > You can reprogram the CPLD once it is soldered, but one has to have > a JTAG programming device (which is not in everyone's toolbox) to do > so. If you were in the US, just swapping boards to you would be no > big deal, but your location makes this a bit tougher (Steve is in > Canada, I think, which is not a ton better, and Andre, not sure, but > sure it is not USA :-) > > I stack up prototype board designs, since at this time, the cost of > the board (USD$5.00) is dwarfed by the shipping cost ($30), and > shipping can be shared among boards. I have 2 other designs, and > working on a third. Once I have it, I will send off for the units. > Anyone who can take a look at the schematic and see if I need to > push more 6509 or 6502 signals into the CPLD *need being an > operative word. I can see some value in pushing a few more high > order address lines into the CPLD, to allow more granularity in > banking, but I want to be mindful of making too much change and then > having to debug those changes along with the original goals. > > Jim > > > On November 7, 2017 at 2:24 PM Michał Pleban <lists@michau.name> > wrote: > > > > > > Hello! > > > > Jim Brain wrote: > > > > > Is there any way for someone to write some test code that would > exercise > > > the various conditions to ensure I have the Verilog correct? > > > > First of all, can you re-program the CPLD on the PCB, or do you > need to > > do before you solder it? In other words, do you have to make it > right in > > one go, or can you correct errors in circuit? > > > > Generally, if you put the thing in the machine and it boots, this > is a > > good sign that it is partially working. Then you can observe > whether it > > boots instantly or after some delay - if it boots instantly it means > > that it didn't find RAM in bank 1 which would imply that LDA (xx),Y > > operations don't work. > > > > Regards, > > Michau. > > > > > > > > > > > > Message was sent through the cbm-hackers mailing list > Message was sent through the cbm-hackers mailing list > > > > Message was sent through the cbm-hackers mailing listReceived on 2017-11-15 07:00:02
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