Or use a 6510 and map p0-p3 to the 0/1 io port, so that the rest of the machine could be tested. On 22/02/2018 09:04, didier derny wrote: > if AEC is tied to VCC I wonder if it is possible to "plug" a 6502 and > force P0..P3 to access only the main page and test the machine > > (obvisouly a custom rom would be needed to test the functionalities) > > > it's useless to try to buy expensive stuff if the board is totally > broken... > Message was sent through the cbm-hackers mailing listReceived on 2018-02-22 12:02:16
Archive generated by hypermail 2.2.0.