Am 22. Februar 2018 12:59:40 schrieb Michał Pleban <lists@michau.name>: > smf wrote: > >> Or use a 6510 and map p0-p3 to the 0/1 io port, so that the rest of the >> machine could be tested. > > The 6510 has no SYNC signal so it will likely not work (the signal is > plugged into RAM refresh circuitry). Also if you change the port, the processor would read the next instruction from a different bank. How would you make sure there is valid code if instructions and load/store always go to the same bank as determined by the port? Regards André Message was sent through the cbm-hackers mailing listReceived on 2018-02-22 13:00:29
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