Re: Hardware emulation of 6509 using 6502?

Den Sun, 25 Feb 2018 08:58:16 +0100 skrev And Fachat <afachat@gmx.de>:
> 
> 
> Am 25. Februar 2018 05:59:00 schrieb Jim Brain <brain@jbrain.com>:
> 
> > On 2/24/2018 9:19 PM, Dr Jefyll wrote:
> >> Dr Jefyll wrote
> >>> We can't have
> >>> read data from memory at $0000 or $0001 /also/ attempting to
> >>> drive the bus.
> >> Huh -- or maybe we CAN!  The question is, are /writes/ to $0000
> >> and $0001 also passed on to RAM? With the present arrangement I
> >> think they are. That means it's OK to have two bus masters later
> >> when the read occurs, because the data will be the same!
> > I was going to response earlier.  I don't think it is a problem.
> >
> > If there is no RAM at 0/1, then the CPLD owns the bus.
> > If there is RAM at 0/1, then the CPLD and the RAM will both own the
> > bus, but there will be not a major problem,
> >
> > The only issue is if there is ROM at 0/1
> >>
> >> But is the present arrangement acceptable? I heard some discussion
> >> somewhere about writes to $0000 and $0001 /not/ being passed on to
> >> RAM. Is that a desirable thing? Here's where my lack of CBM
> >> knowledge becomes apparent...
> > This is an issue with the 6510, where the parts are truly internal,
> > and no external write is asserted
> 
> But as we have banks of memory, would the memory not contain the last
> write _in this bank_? So if I write the register to move to another
> bank, the new bank number is written in the old bank memory location.
> 
> So there could be a conflict when reading in the new bank, because
> the new bank memory location has the last write from leaving it,
> while the cpld has the current bank.
> 
> Right?

The simple solution is to set the page outputs to 14 / $E or any other
unused bank (which tristates the data bus) while reading/writing $0/$1.

As the CPLD anyway can output whatever it wants on the page outputs,
and as it anyway can detect access to adress 0/1, this should not
require any additional hardware as long as there is room in the CPLD
for the extra equations.

However in a hypothetical future CBM-II replica, or in a CBM-II with
maximum amount of ram, we might not get away with this.

I'm not sure if anything uses theese indirect instructions to
read/write adress 0/1 in bank 15. If not, we might get away with
setting page to 15/$F. But both a maximal memory expansion and a
replica can include the necessary hardware to handle this on its own.
(In my idea of a replica, the 6509 emulation hardware is integrated on
the main board and not just a small add-on board).

Anyway it would be easy to first set page to 14/$E (or any other unused
page) while the CPU accesses 0/1, and when everything works try to set
it to 15/$F and see if it breaks something, just to be sure.

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