Re: Hardware emulation of 6509 using 6502?

From: Francesco Messineo <francesco.messineo_at_gmail.com>
Date: Sun, 25 Feb 2018 22:56:37 +0100
Message-ID: <CAESs-_xX9tvU0oDD-tT_-JQShZ3+TU+N6CpF_yQA+gbLG8weXA@mail.gmail.com>
On Sun, Feb 25, 2018 at 10:52 PM, Jim Brain <brain@jbrain.com> wrote:
> On 2/25/2018 3:39 PM, Dr Jefyll wrote:
>>
>> Francesco Messineo wrote
>>>
>>> Are you feeding external clock to phi0 input of the 6502?
>>> If so, I think all should work.
>>
>> Good idea.  IOW, the exact same signal that used to drive Phi0 on the 6509
>> gets routed to Phi0 on the 6502 - right?
>
> I don't think so.  6509 requires external clocks, but the 652 uses an
> internal clock generator.
>

17 ns on a 2 MHz clock isn't going to matter, unless they're really in
the wrong part of the cycle.
Addresses on a 6502 are stable at the rising edge of phi2 but somehow,
on your setup the data bus on a write is asserted too late (in facts,
the data written is the "old" data bus value).

F

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Received on 2018-02-25 23:05:10

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