Jim Brain wrote > * After not having success with the '245 daughter-board, I wired up a > 50MHz oscillator in hopes that I could synthesize a proper PHI_IN Hm, you've reminded me that a Phase Locked Loop is an alternative (and near-ideal) solution re clocking and the delay inherent in using the 6502's Phi0 input. Here's an example I'm familiar with, which is tiny and self-contained -- small enough, I think, for the next rev of your PCB. It can reproduce the input frequency while also exactly matching the /phase/ of whatever reference you give it. Very easy to use! (although it does take up a bit of space on the PCB) http://www.cypress.com/file/38861/download Meanwhile, if you want a temporary solution, you can use the flying lead I suggested earlier (it's just past the halfway point on page 8 of this thread). You shouldn't have to alter any details, as I wrote the suggestion while referring to the schematic, not the %$#@*&^% datasheet! Nice work catching *that* boner, btw! BTW I suspect we'll be forced to return to the other issue -- tristating the mobo when the CPU is reading the ports at 0000/0001. -- Jeff -- Sent from: http://cbm-hackers.2304266.n4.nabble.com/ Message was sent through the cbm-hackers mailing listReceived on 2018-02-28 17:00:03
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