Re: Building a 6502 peripheral - timing

On 03/15/2018 01:33 AM, silverdr@wfmh.org.pl wrote:
> 
> That would imply feeding the chip with PHI2. But memory is not fed with it and still works correctly.

Yes, but if the memory in question is DRAM, then you have /RAS and /CAS 
signals that are timed correctly and they implicitly 'contain' PHI2.

And if you use SRAM, then you need to use PHI2 in the decoding logic to 
make sure that /WE on the RAM can only go low as long as PHI2 is HIGH. 
Otherwise you don't need to care much since a read from the wrong 
address does no harm to the RAM contents. With a peripheral it might 
though, on some of them status registers change state on read.

  Gerrit