> On 2018-03-15, at 00:33, Jim Brain <brain@jbrain.com> wrote: > > On 3/14/2018 6:10 PM, silverdr@wfmh.org.pl wrote: >> Actually I want to "build" a CPLD based peripheral chip. Let's say a port like 6526 but with single port and preferably without feeding it with PHI2. > > Here's a start (copied from working code, but I removed clock, so no guarantees on first time working): Since the conclusion was that the best bet is to feed the chip with PHI2 anyway, maybe you could post a working one? I'll have to rewrite it into vhdl anyway... -- SD! - http://e4aws.silverdr.com/Received on 2018-04-03 20:01:50
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