Re: DMA successes with Verilog

From: Jim Brain <brain_at_jbrain.com>
Date: Thu, 14 Jun 2018 00:05:21 -0500
Message-ID: <87ad3e15-851d-b58e-2b63-d6f103501d1e@jbrain.com>
On 6/13/2018 5:07 PM, silverdr@wfmh.org.pl wrote:
>> On 2018-06-13, at 19:53, Jim Brain <brain@jbrain.com> wrote:
>>
>> implement if the 64 requests the transfer.  The issue, as I understand
>> it, is if you want to surreptitiously DMA data into the running 64
>> memory map, since you don't know where the 6510 is in it's instruction
>> fetch/decode/action cycle, and pulling DMA low will corrupt CPU
>> activities in flight.
> Roger that. I am about something a litte different though. Something like: the CPU puts some data into a buffer and goes about its other businesses. Once it returns it finds the data processed by a DMA capable circuit that reads the data left by the 6502/6510, processes it and writes back to the same (or another) RAM area. All that without actually stopping the CPU. I heard there were some DMA implementations that worked in such way.
>
I don't think you need DMA for that.  Using shared memory (PHI clock 
sharing, like I have implemented before) will accomplish the bulk of 
what you want.  You'd only need DMA if you want to push the memory into 
the second CPU faster.  You could.


DMA a block of memory from local to remote.  CPU is stopped for this action

Have second CPU operate on data

Set a flag

CPU watches for the flag (or interrupt).

When found, DMA the memory back

Jim


-- 
Jim Brain
brain@jbrain.com
www.jbrain.com
Received on 2018-06-14 08:00:59

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