Re: Strange 8255 behavior

>> On 6/15/2018 9:42 AM, Francesco Messineo wrote:
>> that would be actually only 16 macrocells. One of the examples on
>> WinCupl makes 3 x 8 bit ports with DDR on a 32 macrocells CPLD

  I'm pretty sure I know how this is done.  The same trick was used  
for i/o in some early Intel microcontroller chips (MCS48 family).  I  
think they called it a "quasi-bidirectional" port.

  When you read the address what you get is always the state of the  
actual pin (not some internal node).  All the pins have pullup  
resistors. <--- !!

  There is no Data Register.  When you write to the address you're  
writing to the DDR.  Any bit that's written with zero becomes an  
output, and the only possible output value is zero.  The pin is  
actively driven low.  Any bit that's written with one becomes an input  
-- and the pullup resistor brings the pin high (unless driven by  
external circuitry).

There are a few drawbacks, but it's a great trick!  The port uses one  
i/o address (not two), and requires 8 latches, not 16.

  -- Jeff