Re: DMA successes with Verilog

From: smf <smf_at_null.net>
Date: Fri, 22 Jun 2018 07:58:28 +0100
Message-ID: <4ffbe435-1223-d59d-6965-15b732f72d66@null.net>
On 21/06/2018 18:15, Jim Brain wrote:
> But, in that doc (which I referenced), he notes that his plan fails if 
> the code does only reads.  We can debate how likely that would be (I 
> personally like the idea of watching BA, and just ensuring the screen 
> is on), but it's a valid corner case.

He covers that with a timeout after an entire frame of reads. The odds 
that the timeout will occur at the same time as the code decides to 
switch to writing is going to be low but theoretically possible.

Which is why I threw in the ultimax + nmi + irq as another option.

I don't know what a program that has no screen output, has nmi asserted 
constantly, has irq masked and is only performing reads for an entire 
frame would actually be doing.
Received on 2018-06-22 10:00:04

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