Quoting Jim Brain <brain@jbrain.com>: > On 6/28/2018 8:14 AM, Jeff Laughton wrote: >> >> >> Hi, Jim. You'll find some details about timing *differences* in >> Table 7-1 of WDC's 65c02 datasheet [1], which makes a comparison >> with the NMOS 6502. On the 'C02 the $6C opcode (jmp indirect) takes >> one cycle longer. ADC and SBC also apparently take one cycle longer >> if you're in decimal mode. > I am using a Rockwell 65C02.� Any info on those?� I don't know that > I have a 65c02s here yet. > > Jim PS- I should've mentioned: although changing from NMOS to CMOS won't change the *number* of cycles for $B1/$91, it does change the addresses which are touched during the dead cycles, if any. LDA (z-pg),Y has a dead cycle only if there's a page crossing. For NMOS a Partially Formed Address appears in the dead cycle (the penultimate cycle). The PFA hasn't yet had carry added to its highbyte -- IOW the PFA is $100 less than the intended address. For CMOS the PFA is concealed internally and the dead cycle refetches the last instruction byte at PC@ instead. <---- !! STA (z-pg),Y always has a dead cycle. During this cycle... NMOS with a pg Xing puts a PFA on the bus CMOS with a pg Xing refetches PC@ <----- !! NMOS without a pg Xing puts the final, fully formed address on the bus CMOS without a pg Xing puts the final, fully formed address on the bus IOW these last two cases involve a read-before-write. related post here: http://forum.6502.org/viewtopic.php?p=57496#p57496Received on 2018-06-29 08:00:04
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