On 9/17/19 8:40 PM, Jeffrey Birt wrote: > In doing some simple tests on one of the subject DRAM chips, a 41256 64kbit variant made by Motorola (MCM6256P15) I have come up with some surprising results. > > I can fill all 64kbits with 1 or 0, turn off the refresh and wait 30 seconds, then verify all cells and only come up with 100~700 incorrect bits. If the time without refresh is only 1 second only 1~2 bits will be wrong. I'm sure that if these tests were repeated with specific patterns of bits that more wrong bit values would be detected. Years ago I read an article where they tested DRAMs from different makers (that was in the 64Kbit and 256Kbit time). They found out that most US made DRAMs stuck very close to the datasheet, meaning don't give them their 128 (or 256) refresh cycles in 2ms (4ms) and they would lose data while the japanese made DRAMs would mostly retain the data for seconds without bit flips. I thought it shows the different approaches. 'Good enough' and 'best we can make it'. GerritReceived on 2020-05-29 22:44:30
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