RE: In search of bad 4164, 41256 DRAM

In doing some simple tests on one of the subject DRAM chips, a 41256 64kbit variant made by Motorola (MCM6256P15) I have come up with some surprising results.

I can fill all 64kbits with 1 or 0, turn off the refresh and wait 30 seconds, then verify all cells and only come up with 100~700 incorrect bits. If the time without refresh is only 1 second only 1~2 bits will be wrong. I'm sure that if these tests were repeated with specific patterns of bits that more wrong bit values would be detected.

I had some odd errors at first with my read method and finally figured out there was not enough time between asserting CAS and reading the bit value. Inserting an inline 'NOP' instruction added enough delay to allow it to work. The compiler was evidently reordering some instructions (a few serial console print statements AFTER the read) as when I commented those out it would always read gibberish so it took a while to find the root cause, but now unless I purposefully inject errors by turning off the auto refresh it reads/writes without fail.

I guess I should really hook it up to the logic analyzer to confirm the timing of all signals against the datasheet. I think first I'll wait for some bad chips to arrive and work on the software a bit more.

Jeff Birt