Re: In search of bad 4164, 41256 DRAM

On 9/14/19 12:17 PM, smf wrote:
> On 13/09/2019 21:02, Jeffrey Birt wrote:
>> The original project I found online used separate functions for each 
>> test pattern. I want to create a single function that will write a bit 
>> pattern that is passed to it and then verify that pattern is in memory.
> 
> While dram cells can fail completely, because of the analogue nature of 
> dram you can find faults only occur during specific access paterns. So 
> you probably should generate the bit patterns, using one of the many 
> different algorithms that have been created over the years.
> 
> A lot of ddr3 & ddr4 in use today are faulty if tested with 
> rowhammerhttps://en.wikipedia.org/wiki/Row_hammer 
> <https://en.wikipedia.org/wiki/Row_hammer>

That's why you should use ECC-RAM. It doesn't completly protect you 
against Rowhammer, but it makes discovery more likely since your logs 
will fill with messages about corrected errors and uncorrectable errors 
will cause a system panic if your memory controller is configured correctly.

DDR4 should be less problematic than DDR3 since they included a feature 
called 'Target row refresh'. Doesn't seem to result in full immunity though.

  Gerrit