On 4/19/20 9:33 PM, tokafondo wrote: > Well... Do the CPU also follow the VIC timing rule? Ask for access and wait, > to say... 200ns and then read or write? Yes, CPU puts the addresses on the bus, waits until the end of its cycle and then takes whatever it finds on the data lines (in a read cycle). Also, the CPU addresses need to go through the multiplexers (the two 74LS257) and their timing is controlled by VIC through the /CAS line. The 6510/6502 is pretty rigid in this respect. GerritReceived on 2020-05-30 01:30:50
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