(unknown charset) Re: Theorizing about hack / mod / expansion of a C64 motherboard.

From: (unknown charset) William Levak <*wlevak_at_SDF.ORG*> Date: Wed, 29 Jul 2020 19:19:19 +0000 (UTC) Message-ID: (unknown charset) <Pine.NEB.4.64.2007291917030.4994_at_sdf.org> · wlevak_at_SDF.ORG

On Wed, 29 Jul 2020, Rainer Buchty wrote:

> Date: Wed, 29 Jul 2020 18:04:18 +0200 (CEST)
> From: Rainer Buchty <rainer_at_buchty.net>
> Reply-To: cbm-hackers_at_musoftware.de
> To: "cbm-hackers_at_musoftware.de hackers" <cbm-hackers@musoftware.de>
> Subject: Re: Theorizing about hack / mod / expansion of a C64 motherboard.
> 
> On Wed, 29 Jul 2020, Justin wrote:
>
>> It would be interesting to know what the clock limits would be on the board 
>> layout itself assuming some world where you’d want to shove an 
>> FPGA/ASIC/modern RAM/etc into the existing sockets.
>
> I doubt that the board layout will, for all practical purposes, impose clock 
> limits to any chip replacement with respect to bus access.

What about the crosstalk and capacitance of the circuit traces on the 
motherboard? Those traces are wider than on more modern boards.

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