Re: CIA old/new?

On Thu, Jan 07, 2021 at 06:54:12PM +0100, silverdr_at_wfmh.org.pl wrote:
> > On 2021-01-07, at 04:12, Segher Boessenkool <segher_at_kernel.crashing.org> wrote:
> >>> I assume this is the line that goes from CS to the "VIC" pin on the new 
> >>> PLA on a 250469? Trace cut and put cap between them?
> >> 
> >> No. You'd have to put a cap between the /CS on the VIC and GND.
> > 
> > Yup.  Just a low-pass filter, used as a crappy delay.  I would put it
> > close to the pin on the VIC, but that may not matter much.
> > 
> >> You shouldn't do that though.
> > 
> > We only did it to show what causes the problem, yup.
> 
> As I mentioned already in this thread - only (some) of the HMOS-II chips expose the problem.

And yet, everything that matters on those chips is identical, and timing
difference on the chip (different process) cannot be anywhere near 40ns
(half a dot clock is 60ns!)

> Among those which do, it may depend on the chip's temperature (problem fades with temperature rising). OTOH no single NMOS based VIC expose the issue even with the same board timing. Yes, you can patch the _CS line with a cap and crudely work the problem around this way

Which I said is not a good solution, only a simple way to show the
origin of the problem.

> but I say it once again: with the very same _CS timing no NMOS VIC produces the annoying sparkles. So it is up to whoever reads this to decide whether this is a bug of the board/PLA/replacement or the actual HMOS-II VIC. For me it's the latter.

My position is it is not a bug at all, it is as designed.  And it
wouldn't even be noticed until very many years later :-)


Segher