Re: FPGA using Python language

Syntax-wise, it might be similar but you can't just shoot VHDL source code directly to the FPGA logic. It doesn't work that way. You WILL get non-functional or erratic behavioral hell because the syntax means nothing. 

Specialized software are made to compile the hardware description language logic into suitable binary. I could use Forth in theory but at the end of the day, proper binary needs to be generated but to do this properly, you need to know to some degree of reliability of the behavior. Sure, there can still be odd behavior but to engineer the hardware, you need a syntax that is meaningful to the outcome. Sure, these HDLs have syntax that is inspired by these programming languages you mentioned BUT they are their own languages designed for a specific use in a complete toolchain to create FPGA "core" binary files.

FPGAs without any core loaded is "turing nothing" because they are blank with no logic or gates configured to do anything. This is why product designers with FPGAs have some hard programmed like a CPLD sitting somewhere with some basic logic to load a core from Flash medium into an FPGA otherwise, you got a brick if you blank the core or install a malfunctioning core or something that doesn't work. 

The purpose of these languages is to describe the hardware and a special tool is provided to take HDL source codes and turn that into specific binary for a specific FPGA make and model. There is no universal binary file that runs on one specific FPGA make and model that is guaranteed to work on another FPGA model from the same manufacturer. Although, you can take the same source code and may get it to work on another model like a ACEX 1k30 to a 1k100. It may likely work because of the similarity of the platform and the larger 1K100 can likely take a core that runs on a 1K30 but you can't expect it to just magically work on a Cyclone V even though all of them are made by Altera. You can't just assume it will without going back to source through a process called "synthesis". 

You would have to make a custom extension of syntax to whatever language you are using to provide a meaningful and useful syntax to the hardware engineer and you'll need to then build a new synthesis tool and go through the work of building support for synthsis to a range of FPGA chips. 

In theory, yes, you can do what you are describing but there is more work involved than you maybe assuming because FPGAs do not natively binary code designed for say... a 6502. You can already imagine the chaos of executing a binary executable for an 8086. Computer will likely crash. FPGA will likely behave in some chaotic fashion and you could conceivably damage or destroy the FPGA. 

To run Python on an FPGA, you have a make a core that is running some kind of VM or something to execute the Python code. So you would need to have some kind of object code and create a processor that runs that object code more or less as its "native" language but the underlying FPGA logic gates binary is more akin to programming the PLA chip in the C64.



> On 02/21/2021 8:01 AM smf <smf_at_null.net> wrote:
> 
>  
> Fpga's are turing complete programmable logic, VHDL is based on
> pascal/ada, verilog is based on C. There is no reason you can't write
> for them in python.
> 
> https://www.digikey.co.uk/en/articles/build-and-program-fpga-based-designs-quickly-python-jupyter-notebooks
> 
> On 21/02/2021 07:24, admin_at_wavestarinteractive.com
> admin_at_wavestarinteractive.com wrote:
> > *scratches head*
> >
> > First off, FPGAs requires a hardware description language and special tools to "compile" it to a logical binary file that configures the FPGA logic gates and all.