Good points to add to what I just mentioned about a complete toolchain to go from HDL to a binary that you can load into a programmable logic device (FPGA for example). You key process is known as synthesis (for those that don't know) but also that simulation steps that you mentioned. In theory, I can use Forth and create a HDL syntax but all that is meaningless until I can convert the source syntax into a proper logic binary for a particular FPGA and like you mentioned, there is those steps of simulation and the synthesis part. > On 02/21/2021 8:45 AM Luis Rene Vela Garcia <lrvg1010_at_gmail.com> wrote: > > > Hi, > > My work is related in design Ipcores for telecommunications in Verilog HDL. I am also teaching digital systems and fpga design. And i think the problem of understanding HDL and FPGAs is to understand that nowadays digital systems design is based in three aspectos mainly: PLDs technology understanding, Hardware description languages and knowing how to conceptualize a digital Architecture for a specific application or problem. > > In my opinion, there is a confusion between how to code in Verilog (to learn the sintaxis) and how to design a module or modules. Also, it is necessary to understand the vendor tool. Xilinx Ise and Quartus are okay, how ever the newer tool of Xilinx (vivado its a nightmare also you need a many gigabyte of storage for the tool). > > Also, in order to design correctly a digital systems using HDL and PLDs, it is necessary to understand the concept of Simulation and how to write testbenches. > > Always at begining of the course some of my students get worried because think that this is too much to learn, but later they understand that this requires babysteps. > People interested in PLDs and their programming, have to understand that one thing is to know about this technology and HDL, and the thing is to go for the process of designing of a digital system and its veritifation. > > > However, many software guys (no electronics engineering most of them ) are doing great and interesting tools for avoiding HDL languages. Some toolboxs are becoming popular, such as Spinalhdl and nMigen which are toolbox for python. However, these toolboxes are popular for Lattice FPGAs due to the icestorm project as well as the trellis project. These projects are open source toolchains for developing Hardware in order to avoid vendors tools. > > I recommend to watch some videos about nMigen if someone is interested in avoiding HDLs: > > https://youtu.be/85ZCTuekjGA > https://hackaday.com/tag/icestorm/ > https://github.com/m-labs/nmigen > https://hackaday.com/tag/nmigen/ > > https://spinalhdl.github.io/SpinalDoc-RTD/ > > For me is easier Verilog HDL, however Im starting to check python with nmigen. > > Cheers, > Luis Vela > dsp8bit > > El dom., 21 de febrero de 2021 10:03, smf <smf_at_null.net mailto:smf_at_null.net > escribió: > > > > Fpga's are turing complete programmable logic, VHDL is based on > > pascal/ada, verilog is based on C. There is no reason you can't write > > for them in python. > > > > https://www.digikey.co.uk/en/articles/build-and-program-fpga-based-designs-quickly-python-jupyter-notebooks > > > > On 21/02/2021 07:24, admin_at_wavestarinteractive.com mailto:admin_at_wavestarinteractive.com > > admin_at_wavestarinteractive.com mailto:admin_at_wavestarinteractive.com wrote: > > > *scratches head* > > > > > > First off, FPGAs requires a hardware description language and special tools to "compile" it to a logical binary file that configures the FPGA logic gates and all. > > > > > > >Received on 2021-02-22 23:02:15
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