> VIC2 cannot use color ram in DRAM at all. The VICII data bus is 12 > bits wide, but is shrunk to 8 bits during cpu cycles by a 2x4 (4066) > switch to allow the cpu access to color memory. Using DRAM for color > memory would require adding more DRAM to the system. I think that was a solution of compromise so they could stop tinkering with the address decoding logic. Why should it be a problem to have color RAM mapped in DRAM in the first place? They had to include a SRAM chip in *every* computer (later revisions would have it included in that SHARP chip). > On Wed, Nov 3, 2021 at 5:23 PM Claudio Sánchez <tokafondo_at_gmail.com> wrote: >> >>> You can already access the dram underneath color ram. >>> >>> VIC2 cannot use dram for color ram by reprogramming the PLA. >> >> It has a direct connection, hasn't it? >> >>> On 02/11/2021 09:39, Tokafondo wrote: >>>> What about the color RAM? How to access the real RAM underneath? Could >>>> reprogramming the PLA allow using DRAM instead of SRAM? >>>> >>> >> >Received on 2021-11-04 00:00:03
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