Re: Could you make a 'new', 'better' computer from the C64 just by reprogramming the PLA?

From: Segher Boessenkool <segher_at_kernel.crashing.org>
Date: Wed, 3 Nov 2021 18:21:21 -0500
Message-ID: <20211103232121.GH614_at_gate.crashing.org>
Hi!

On Wed, Nov 03, 2021 at 11:31:34PM +0100, Spiro Trikaliotis wrote:
> * On Wed, Nov 03, 2021 at 09:37:39PM +0000 Claudio Sánchez wrote:
> > > VIC2 cannot use color ram in DRAM at all.  The VICII data bus is 12
> > > bits wide, but is shrunk to 8 bits during cpu cycles by a 2x4 (4066)
> > > switch to allow the cpu access to color memory.  Using DRAM for color
> > > memory would require adding more DRAM to the system.
> 
> > I think that was a solution of compromise so they could stop tinkering
> > with the address decoding logic. Why should it be a problem to have
> > color RAM mapped in DRAM in the first place? They had to include a
> > SRAM chip in *every* computer (later revisions would have it included
> > in that SHARP chip).
> 
> The VIC address video RAM and color RAM in one go at the same time. For
> this, it has a data bus of 12 bits: 8 bits go to the DRAM for the video
> RAM, and 4 bits go to the SRAM for color ram.
> 
> Thus, the video RAM and the color RAM have to be in separated memory
> chips in order to be accessible simultaneously by the VIC-II.

Yes.

Also consider that on the original VIC-II chip (the 6566, mentioned
below) *all* RAM was SRAM, there was no refresh (and no RAS/CAS etc.,
which caused problems on many VIC-II revisions).

> This could have been done, for example, with a second DRAM bank (for
> example, with a 128 KB configuration), but that would be to expensive
> for the C64.
> 
> The SRAM solution is much easier than this or other solutions (like
> using two RAM accesses and multiplexing it to D0-D7 and to D8-D11).

And the SRAM solution was already there, no development costs at all.
Also, it needs a 1024x4 device, are there DRAM devices that small?  For
SRAM it is a very common size (2114, 6814, 6148, etc.) :-)

> Note that this is true even for the SRAM-version 6566, which also has a
> 12 bit data bus.

And didn't have the address bus muxed in weird and wonderful ways, like
the DRAM VIC-IIs do: the hardware allows it to use 128-byte or 256-byte
pages, via a metal strap.  Everything that shipped uses 256-byte as far
as I know.  So you have double muxing for A0/(A7/A8), etc.  And A7..A11
are on separate pins as well, for the SRAM.  This was much more elegant
on the original 6566...  I would love to see a good die photograph of
that :-)


Segher
Received on 2021-11-04 01:00:02

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