On 11/6/21 9:19 PM, Claudio Sánchez wrote: >> On 11/6/21 6:55 PM, Claudio Sánchez wrote: >>>> If you can find a chip that needs 7.88mhz on pal and 8.18mhz on ntsc >>>> then sure, but you're then just using the DOT clock as a cheap way of >>>> getting a clock. >>> >>> Well... at first it is. It's a cheap way of getting a clock. >>> >>> phi2 pin is AFAIK a copy of what the 6510 gives out to the rest of >>> the system, so when the 6510 gets halted by the VIC-II... is phi2 >>> affected? >> >> No, the 6510 gets halted by the RDY pin, clock is not affected. >> >> Gerrit >> >> > > Yes, so the fact that the VIC-II asks the 6510 to stop doesn't mean that > when the latter is halted, its phi2 output also gets halted, or is it? No, it doesn't. Also, remember that a 6502 cannot be stopped during a write cycle. That's why VIC tells the CPU to stop 3 cycles (the max number of write cycles in a row on the 6502) before VIC needs the CPU to be stopped. GerritReceived on 2021-11-07 09:00:02
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