--- Richard Atkinson <rga24_at_cantab.net> wrote:
> 8 bit refresh counter, as on VIC-II and the REC. This works for DRAM chips
> up to 256Kbit density (41256, 41464). Again, it's the length of the
> refresh counter which is important.
When I used to make Qbus and VAXBI intellegent serial cards, we recycled
our 74S409-based refresh scheme for our final product - the 409 is happy
with 64K and 256K refresh cycles (and we had pounds and pounds of them).
We went from a 41256 design to a 44256 design with no strangenesses. The
44256 was common at one point (it was the DIP RAM found on a C= A2091
disk controller and in the A590 disk side-car).
If you were planning on recycling the REU chips into a different design
with more RAM and you could find enough 44256 chips to make it worthwhile,
that's one way to go. It's not line 1Mx8 chips are easy to find, either.
-ethan
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