From: Spiro Trikaliotis (trik-news_at_gmx.de)
Date: 2003-11-07 07:05:24
Hello,
On Thu, Nov 06, 2003 at 08:32:36AM +0100, Anders Carlsson wrote:
> How does the 6800 do BRK (if it has a similar op-code at all)?
According to my manual (I never programmed a 6800, I "only" worked with
6809), the 6800 has the "SWI" command ("SoftWare Interrupt").
Its opcode is $3F, it takes 1 byte and 12 cycles for execution.
(Compared to the 6502: $00, 1 byte with the "anomalie" 2 bytes, 7
cycles)
Executing SWI, the CPU does the following:
1. PC is incremented by 1
2. All registers are put on the stack
3. The flag "I" is set to 1, preventing further IRQs
3. $FFFA/$FFFB is read to get the interrupt vector
Note: Since the 6800 is big endian, $FFFA is the high-byte,
while $FFFB is the low-byte.
4. The PC is set to that interrupt vector
There is no B-Flag as with the 6502; the CPU distinguishes between IRQ
and SWI by the interrupt vector ($FFF8/9 for IRQ, $FFFA/$FFFB for the
SWI; BTW: $FFFC/$FFFD for NMI, $FFFE/$FFFF for RESET)
Thus, the 6800 does not show the "BRK-anomalie" of the 6502.
I think the explanation of Gideon should tell everything: It seems that
it was just easier chip design that led to this behaviour.
Spiro.
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