Re: DMA successes with Verilog

From: smf <*smf_at_null.net*> Date: Thu, 14 Jun 2018 23:17:26 +0100 Message-ID: <31fe999e-7046-bc0d-042a-084922bc6fd5@null.net> · smf_at_null.net

On 14/06/2018 22:29, Mia Magnusson wrote:
> More than two accesses to concecutive addresses means
> that it is fetching from program, i.e. instructions or operands. Then
> it would be easy to see when it accesses some place else, that must be
> data. Backtrace the data bus a bit and then you can be sure where that
> instruction started and where it will end.

Spot the start of the instruction

$ADAA LDA $ADAD