On 6/21/2018 10:55 AM, Mia Magnusson wrote: > No, you also have the option of following the CPU activity and thus be > sure that you don't start the DMA in a state where there is a risk of > unwanted extra accesses to the I/O addresses. Worst case that would > need half of a 6502 core in programmable logic but it must be possible > to simplify this a lot. I think this bears figuring out. Given an assumption that your logic will see all of the same data as the 6502 core, what is the simplest logic configuration that would generate a new SYNC signal. Seems like a nice logic puzzle. > -- Jim Brain brain@jbrain.com www.jbrain.comReceived on 2018-06-21 20:00:05
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