On 5/29/21 9:26 PM, Spiro Trikaliotis wrote: > Hello, > > * On Sat, May 29, 2021 at 12:37:29PM -0500 tokafondo wrote: > >> The idea is to have 64K of memory exclusive to the VIC-II mapped into the >> memory address of the '816. > > Adding to what Jim already wrote: Please be aware that the VIC-II can > only address 16 KB of RAM without help. But it will generate multiplexed addresses as if they were for 64 KB and will also generate a 256 cycle Refresh. So you need to supply 2 more bits and best would be to demultiplex everything and go with SRAM since then you can implement your own access timing easier as if you were using DRAM. GerritReceived on 2021-05-29 23:00:25
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