Assuming this is going to be c64/c128 compatible then the extra two bits can come from the cia. But for sure demultiplexing the ras/cas and buffering the fetched data so you don't have to have the ram timing so reliant on the vic2 would be the way forward. You can't really do that with a supercpu style accelerator attached to the expansion port, but it's more like how the ultimate64 does it with the virtual cpu/vic2 (it has 48 x the ram bandwidth, vic2 takes one slot and the cpu has 47). On 29/05/2021 21:08, Gerrit Heitsch wrote: > So you need to supply 2 more bits and best would be to demultiplex > everything and go with SRAM since then you can implement your own > access timing easier as if you were using DRAM. > > Gerrit >Received on 2021-06-01 19:02:59
Archive generated by hypermail 2.3.0.