On 6/22/22 23:15, Jesus Cea wrote: > On 22/6/22 21:24, tokafondo_at_tokafondo.name wrote: >> YIKES!!! I pressed 'sent' by mistake and didn't had completed the post!!! > > Remember than RAM is accessed twice per cycle: CPU and VIC-II. > > If I would design a fast 6502-like accelerator I would interpose a fast > cache (write thru with a small (maybe 1-2-4 bytes) write buffer) or, > using something like a 65816, fast and exclusive RAM in other banks. > > Dynamically adjusted 6502 frequency will not get you anything useful, > because 6502 do a memory cycle per CPU clock, always, even when not > useful at all. Too complicated, too little gain. Didn't they do that in the C128 when running at 2 MHz? GerritReceived on 2022-06-23 07:00:03
Archive generated by hypermail 2.3.0.