On 6/6/2024 2:12 AM, Baltissen, GJPAA (Ruud) wrote: > My thought: what about using an asynchronous interface? I made one towards the expansion bus for the C64 once. Pre-condition: the 6510 is halted already, and that is the case here, and check BA. > > For a read: > - wait until the Phi2 is (L) > - during Phi2 is (H), latch the data into 573 or equivalent > - after Phi2 goes (L), run on full speed again I don't think you need the 573. If a read happens, just wait until phi2 rises, and then use the Z80 normal CLOCK cycle for 1 cycle to read the data (I think it's a 4Mhz clock cycle), and then go back to full speed. I don't think you have to wait until Phi2 goes low again, as the Z80 ran at 4MHz normally, so the RAM must be able to handle that speed. > > During a write: > - wait until the Phi2 is (L) > - when Phi2 goes (H), output the data on the data bus and start waiting > - after Phi2 goes (L), run on full speed again Same here, I don't think you need to wait for the entire Phi2 cycle. Just enough of it to do the write. -- Jim Brain brain_at_jbrain.com www.jbrain.comReceived on 2024-06-06 09:00:09
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