From: Baltissen, R (Ruud) (ruud.baltissen_at_abp.nl)
Date: 2003-08-19 15:49:08
Hallo Oliver,
> Actually, the original 64er 2Mhz accelerator would also need a
> 4Mhz part since the designer stuffs 2 cycles into one time-window.
No, 3 MHz. Find out yourself why :)
> > Remark for Oliver: when using the 65816, what about using its 16 MB
> > capabilities? Can provide you with quite some nice ideas.
>
> I´m eager to hear them... :-)
The start is quite simple:
- you need a 74LS245 as buffer between the data lines of the C64 and 65816
- you need a 74LS541 to buffer the addresses A11..A15 and the R/W line
between the C64 and 65816
- you need pull-up resistors for the addressbus and R/W line
- you need a 74ALS573 to generate A16..23.
- you need a 74LS688 to find out if the firts 64 KB are addressed or not.
- you need some small glue logic
When data is read or written to the first 64 KB area, the original C64 parts
are addressed. If not, the 688 will disable the 245 and the 541 which causes
the C64 to think that data is read from the $Fxxx area.
Now you are free to use the complete 16 MB :)
> No need to do that. With the fast SRAM replacing the old
> DRAMs, everything (except register writes) can run at full speed.
Don't forget the ROMs. (but you mentioned using the 29F010)
> Why slow-down writes when the Drams are replaced anyway? Only
> access to the colour ram has to be slowed down.
Why not replace it as well? You mention the use of 8 virtual C64s. Then this
also meeans the need of 8 color RAMs. Other wise you will face the problem
that as soon as one virtual C64 changes the backgroundcolors, this action
will affect ALL C64s.
--
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/ __|__
/ / |_/ Groetjes, Ruud
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\___| http://Ruud.C64.org
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