I was asking for comments in the 6502.org forum about the need of a 65xx HAL. This discussion had no success there so I'm starting it here again. The fact that the 65xx CPUs are limited in things like: - How many registers they have and their purposes - How much memory they can address - How many different opcodes can be implemented and what can they do ...is a hardware thing. The registers are actually "memory" inside the chip that whose contents can be altered or copied to the external memory via the system bus. And the opcodes are calls to internal circuits that do those operations. But there is no other limitation for the existence of more registers, bigger memory addressing capacity or amount of opcodes that the hardware itself. So what I'm talking about is if would it be of any help the creation of a 65xx HAL that would implement a kind of "high level" language where there would be: - A, B, C... Z registers - Unlimited memory addressing including virtual memory - Unlimited opcodes, including compatible with every known 65xx variant in existence What would be this useful for? Via the use of an simulator/emulator, the programmer would code and debug what needed and once done, via a compiler it would translate to VHDL code that would create the exact CPU or MPU needed for the needed application. What do you think?Received on 2022-09-03 23:00:09
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